1. Field of the Invention
This invention is directed to a semiconductor device and a method of manufacturing the same, especially to a semiconductor device with a SOI (silicon-on-insulator) structure and its manufacturing method.
2. Description of the Background Art
FIG. 23 is a sectional view showing NMOS and PMOS transistors 24, 25 formed on a SOI substrate, as one of examples of the semiconductor device with the SOI structure.
With reference to FIG. 23, a buried oxide film 2 is formed on the main surface of a silicon substrate 1, and a single-crystal silicon layer 3 (hereinafter referred to as a SOI layer) is formed on the buried oxide film 2. With the SOI layer as a substrate, the NMOS and the PMOS transistors 24, 25 are formed thereon.
The NMOS transistor 24 includes a pair of source/drain layers 35b independently formed parallel to each other at the surface of the SOI layer 3, and a pair of lightly doped drain layers 35a (hereinafter referred to as LDD layers) formed adjacent to the facing edges of the source/drain layers 35b. A gate oxide film 30 is formed on the SOI layer 3, and a gate electrode 28 is formed on the gate oxide film 30. Further, sidewall oxide films 26 are formed at the side surfaces of the gate oxide film 30 and the gate electrode 28.
The PMOS transistor 25 includes a pair of source/drain layers 36b independently formed parallel to each other at the surface of the SOI layer 3, and a pair of LDD layers 36a formed adjacent to the facing edges of the source/drain layers 36b. The gate oxide film 30 is formed on the SOI layer 3, and the gate electrode 28 is formed on the gate oxide film 30. Further, the sidewall oxide films 26 are formed at the side surfaces of the gate oxide film 30 and the gate electrode 28.
The NMOS and the PMOS transistors 24, 25 are electrically isolated by an isolation oxide film 40 formed so as to reach to the buried oxide film 2 from the surface of the SOI layer 3. The isolation oxide film 40 isolates the NMOS and the PMOS transistors 24, 25 from other elements as well.
FIG. 23 also shows that high-concentration impurity regions 130 are formed in contact portions between the isolation oxide film 40 and the SOI layer 3 on which the NMOS transistor 24 is to be formed.
As described above, the NMOS and the PMOS transistors 24, 25 formed on the SOI substrate have structures with the SOI layer 3, which is to be a channel, held between the gate oxide film 30 and the buried oxide film 2. Thus, the SOI layer 3 is inferior in crystalline to a bulk silicon substrate, and further is formed thin as is evident from FIG. 23.
Further, into such SOI layer 3, impurity ions are generally implanted in a manufacturing processes, such as channel implantation and source/drain implantation, of the NMOS and the PMOS transistors 24, 25. This gives damage to the SOI layer 3 and causes further deterioration in crystalline. Thus, a transistor formed on the SOI substrate is inferior in transistor characteristics to that formed on the bulk silicon substrate.